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How an LNA Specification Becomes Synthesizable RTL

How an LNA Specification Becomes Synthesizable RTL

Start with the input: noise figure less than 2.5 dB, gain greater than 15 dB, input return loss better than -10 dB at 2.4 GHz, supply 1.8 V, -40 to 85 C operating range. Turning that table into a synthesizable RTL block takes more than one step. At least four separate technical choices must precede RTL writing, and those choices decide whether the first simulation run provides useful results or must be discarded.

Step 1: Set the Behavioral Abstraction Level

An LNA supports several behavioral detail levels. At the simplest, it is a frequency-independent gain and noise figure constant: a real-number output computed by applying a fixed gain parameter to input power. This model passes every DC and small-signal linear verification test, but cannot verify the LNA's frequency response, matching behavior, or compression characteristics.

The next fidelity level adds frequency-dependent gain, a noise figure calculation using the Friis formula at the operating frequency, and gain compression above the stated P1dB. Skycore uses this level by default for a receiver front-end LNA because it is the minimum needed for meaningful spec verification.

More detailed options include S-parameter fitting across the full frequency range and temperature-based parameter scaling. They increase simulation time, so they usually serve final block-level sign-off simulation instead of architectural RTL exploration.

The target fidelity must be selected explicitly. Skycore treats it as a block-description parameter: S11 return loss or frequency-sweep gain measurement causes the generator to add a matching network behavioral model. Temperature corners add parameter scaling with temperature. Without either, the output uses a simpler frequency-independent model. Generated output shows this mapping in comments, linking every spec requirement to its implementing code.

Step 2: Expose the Spec Parameters

gain_db = 16.5 hidden inside an RTL assignment is a shortcut that becomes costly when the spec changes. Finding that value three levels down in an always block means locating it, identifying its related parameter, and editing it without disturbing nearby logic. That may take twenty minutes when the model is familiar, or two hours after six weeks away on another block.

Skycore places every spec-derived constant in module parameters at the port declaration level. Named parameters cover the noise figure target, gain nominal, P1dB, supply voltage, and frequency band, with units noted in comments. A changed spec then requires a module-instantiation parameter edit, not code archaeology.

// Generated LNA behavioral model -- parameterized spec
module lna_2g4_behavioral #(
  // Spec-derived parameters (from design intent description)
  parameter real GAIN_NOM_DB    = 16.5,   // Nominal gain [dB]
  parameter real NF_TYP_DB      =  2.3,   // Noise figure typ [dB]
  parameter real P1DB_IN_DBM    = -10.0,  // Input 1dB compression point [dBm]
  parameter real S11_MIN_DB     = -10.0,  // Min input return loss [dB]
  parameter real F_CENTER_GHZ   =  2.45,  // Center frequency [GHz]
  parameter real BW_GHZ         =  0.15,  // Bandwidth [GHz]
  parameter real VDD_NOM_V      =  1.8,   // Nominal supply [V]
  parameter real TEMP_NOM_C     = 27.0    // Nominal temperature [C]
)(
  input  real pin_dbm,      // Input power [dBm]
  input  real freq_ghz,     // Operating frequency [GHz]
  input  real temp_c,       // Operating temperature [C]
  input  real vdd_v,        // Supply voltage [V]
  output real pout_dbm,     // Output power [dBm]
  output real nf_actual_db, // Actual noise figure [dB]
  output real s11_db        // Input return loss [dB]
);

Step 3: Frequency Response Model

A 2.4 GHz LNA with input return loss requirements uses a matching network that presents 50-ohm input impedance at its operating frequency. The network is absent from an RTL behavioral model. Instead, the model represents its function: gain peaks near center frequency, declines toward the band edges, and input impedance matching worsens beyond the band.

A Lorentzian gain-versus-frequency curve is the simplest behavioral choice, with center frequency and bandwidth as parameters. It captures the needed qualitative response without knowing the circuit's LC tank or transformer topology. The goal is not circuit reproduction, but the transfer function a system-level simulator uses to test whether the LNA meets its link budget allocation.

// Frequency-dependent gain with Lorentzian rolloff
function automatic real gain_at_freq(
  input real f_ghz,
  input real f0_ghz,
  input real bw_ghz,
  input real gain_pk_db
);
  real norm_offset;
  begin
    norm_offset = (f_ghz - f0_ghz) / (bw_ghz / 2.0);
    gain_at_freq = gain_pk_db - 3.0 * norm_offset * norm_offset;
    // Clamp to avoid negative gain outside band
    if (gain_at_freq < 0.0) gain_at_freq = 0.0;
  end
endfunction

Return loss from the matching network uses a symmetric Gaussian rolloff around center frequency, matching resonant-network behavior. Its parameters are minimum return loss at center frequency and 3 dB bandwidth. Both appear as module parameters linked to the spec.

Step 4: Add Compression and Saturation

P1dB is the input power where output sits 1 dB below the extrapolated linear-gain line. Without compression, a behavioral model reports infinite gain at every input power, corrupting linearity results in cascaded block simulations. Physical accuracy is unnecessary here; the model must reproduce the gain-versus-input-power curve that spec testbenches examine.

A common approximation uses a smooth saturation function to move gain from linear operation into compression. P1dB sets the transition. At high input drive, output power approaches a saturation limit, stopping overdriven simulations from producing nonphysical values.

The compression model in synthesizable RTL is a mathematical approximation of the physical effect. It reproduces gain rolloff and the 1 dB compression point, but not harmonics from a transistor-level circuit, which require full circuit simulation. This RTL behavioral model serves link budget and system-level simulation, not transistor-level characterization.

Skycore Automation and Engineer Decisions

With a complete block description and its spec parameters, Skycore fully automates steps 2 through 4: parameter structure, frequency response, and compression function come directly from the spec, without hand-written RTL. The synthesizable output includes comments linking each model element to its spec parameter and a testbench checking gain, noise figure, and return loss at center frequency.

Step 1 remains a human decision: choose the fidelity suited to the simulation purpose. Skycore derives a default from clues in the block description, but the reviewing engineer should verify that the abstraction fits the intended run. Module-level comments state the fidelity choices, making that review straightforward.

RTL-adjacent testbenches check every spec parameter separately at the nominal operating point. By default, they do not sweep PVT. To cover PVT corners, specify temperature and supply ranges; Skycore then creates a parametric sweep testbench across the full corner set. The default testbench is a quick sanity check, while the PVT sweep is the sign-off simulation.