Defining Meaningful Simulation Coverage for RF ICs

Toggle coverage tells you nothing about whether an RF block meets its specifications. Digital sign-off often asks whether the coverage model is closed. RTL simulation of RF IP raises the same question, but a digital-derived model misses the point. A block can show 100% toggle coverage while major parts of its operating space remain untouched.

Why Code Coverage Misses RF Behavior

Toggle and line coverage expose dead code and untested digital paths. There, a net that never toggles may be stuck or its logic branch may never run. In an RF behavioral model, the same net may stay quiet because stimulus never reached the input power needed to activate it. That is not dead code. It is a stimulus gap requiring a different remedy.

Consider a behavioral LNA with gain compression above -10 dBm input power. If every run uses -30 dBm, the compression path never executes, so toggle coverage marks its net uncovered. The diagnosis is "stimulus range too narrow," not "dead code." Add tests at higher input power, rather than removing the compression logic. A metric unable to distinguish between those two conditions offers no useful RF IP sign-off signal.

Code coverage has the same limitation. A model may reach 100% statement coverage with a -30 dBm single-frequency stimulus yet cover none of the gain-versus-frequency curve, band-wide NF budget, or edge return loss. All statements ran, but the specification behavior was not tested.

What RF Block Coverage Must Measure

Spec-oriented coverage builds simulation around the parameters defined by the block specification. For an LNA, verify that simulation covers:

• NF across the specified frequency range at every required temperature corner
• Gain from small-signal input through the 1 dB compression input power (P1dB)
• Input return loss (S11) versus frequency, checking matching behavior against spec
• Supply corners: low (typically 5% below nominal), nominal, and high
• Temperature corners: industrial range (-40 C to 125 C) or commercial range, per product spec

For a mixer, coverage instead centers on conversion gain, input and output return loss, IIP3 versus input frequency, and NF at the intermediate frequency. For a phase-locked loop synthesizer, it should include lock time across reference frequency steps, reference spur levels relative to the carrier, and phase noise at specified offsets from the carrier. Every block has its own spec space, so coverage should follow it directly.

Each spec criterion needs a measurable pass or fail limit taken from the block spec. With this structure, simulation closure means satisfying the constraints across the required operating space, rather than merely executing code paths.

PVT Coverage

Process-voltage-temperature sweeps are a frequent source of RF coverage gaps. A standard 5-corner PVT sweep (TT, FF, SS, FS, SF), combined with three supply voltages and two temperature extremes, creates 30 discrete operating conditions. Manual setup, output handling, and spec-result parsing take time. As a result, teams often run TT nominal plus one or two stress points instead of the entire corner set.

The risk is significant because many RF failures emerge only where corners intersect. An inductively degenerated LNA may meet NF at TT nominal yet fail at the SS corner under low-temperature conditions, which TT-only simulation cannot reveal. The SS process corner lowers transconductance, while low temperature shifts carrier mobility in a way that adds to gain loss. Together, they drive NF above budget although nominal results look clean.

This failure pattern is common, not exceptional. Tapeout-blocking silicon problems often look acceptable at nominal and appear only when production lots reach process-distribution corners. Full PVT coverage is not excess caution. It is the simulation needed to determine whether production margin is sufficient.

Coverage Groups and Spec

The practical way to manage spec-oriented coverage is to define groups, with each group representing one spec requirement across all required operating conditions. Rather than keeping a flat pass-or-fail result list, the model follows the structure of the specification.

// SystemVerilog coverage group example: NF measurement coverage
covergroup nf_coverage @(posedge clk);
  option.per_instance = 1;

  cp_freq: coverpoint freq_mhz {
    bins band_lo  = {[2350:2399]};
    bins band_nom = {[2400:2450]};
    bins band_hi  = {[2451:2500]};
  }
  cp_temp: coverpoint temp_c {
    bins cold = {[-40:-1]};
    bins nom  = {[0:85]};
    bins hot  = {[86:125]};
  }
  cx_freq_temp: cross cp_freq, cp_temp;
endgroup

If a group maps to the requirement ("NF shall be below 2.5 dB across 2.35 to 2.5 GHz over the industrial temperature range"), each cross-coverage cell denotes an operating condition that simulation must reach. The report identifies covered and missing cells. "Not covered" then means that frequency-temperature combination was not simulated.

Use Structural Coverage as a Check, Not Sign-Off

Code and toggle coverage still have value for RF IP blocks. They provide a sanity check: 40% statement coverage indicates inadequate exercise, and low toggle coverage on a critical path deserves review. The mistake is using complete structural coverage as proof that an RF IP block is fully verified. It is necessary, but nowhere near sufficient.

A behavioral RF block may achieve 100% toggle coverage while remaining unverified against its spec because stimulus omitted the required input power, frequency, or PVT range. Structural metrics establish a floor; spec-oriented criteria establish a ceiling. Both are useful, but only one supports sign-off.

Coverage Planning in Spec Translation

When we built Skycore's coverage planning component, we aimed to derive the plan from the same spec description used to generate RTL. If the description says "NF less than 2.5 dB at 2.4 GHz, gain greater than 15 dB, supply 1.8 V, industrial temperature range," the plan should include NF at 2.4 GHz across temperature, gain at small-signal input for each process corner, S11 at supply corners, and P1dB at worst-case PVT.

This linkage keeps coverage aligned as the spec changes. If supply tolerance moves from 5% to 10%, the plan's supply corners change automatically. In our early-access work, teams using spec-linked coverage reported shorter, clearer closure reviews: the report showed whether each requirement had been tested, without interpreting code metrics.

The price is writing a complete spec description upfront. That costs less than finding a corner failure after RTL verification, during layout review, when fixes are narrower and schedule damage is greater.